EPFL/STI/IEL/LSM Expert in chip design, intelligent detector, VLSI design, high-level specification and synthesis, sensors development
Yusuf Leblebici
EPFL
ULP-Systems
Sub-Threshold Source-Coupled Logic (ST-SCL) Systems for Ubiquitous System Applications

Project Description

The demand for implementing ultra-low power digital systems in many modern applications such as mobile systems, sensor networks, and implanted biomedical systems, has made the design of logic circuits in sub-threshold regime a very important challenge.  

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Notable publications

Low-Power and Widely-Tunable Linearized Biquadratic Low-Pass Transconductor-C Filter
A. Tajalli and Y. Leblebici


Design trade-offs in ultra-low-power CMOS and STSCL digital systems
A. Tajalli and Y. Leblebici


Ultra-Low Power Mixed-Signal Design Platform Using Subthreshold Source-Coupled Circuits
A. Tajalli and Y. Leblebici


Power and Area Efficient MOSFET-C Filter for Very Low Frequency Applications
A. Tajalli and Y. Leblebici
Analog Integrated Circuits and Signal Processing, 2011


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Posters from 2011


Sub-threshold source-coupled logic (ST-SCL) systems for ubiquitous system applications
Armin Tajalli, Yusuf Leblebici