Expert in circuits and systems for telecommunications (wireless and wired),and the prototyping and silicon implementation of new communication technologies
Andreas Burg
Developing inexact sub- and near-threshold systems for ultra-low power devices
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Expert in design technologies for next-generation heterogeneous many-core platforms
Luca Benini
Expert in wireless sensor networks, very low-power analog IC design and semiconductor device modeling
Christian Enz
Expert in low-power microtechnology
Philippe Rochaix
Expert in wireless sensor networks
David Ruffieux

Project Description

The notion of exact computation, where outputs of the computational element (circuit) have precise deterministic values, as well as the fact that electronic chips are powered at nominal voltages for increased performances, have been pervasive in the computing domain for many decades owing to the overwhelming success of the integrated circuit design using reliable transistors, particularly in Complementary Metal-Oxide-Semiconductor (CMOS) technology. However, semiconductor industry is facing serious challenges today as diminishing transistor sizes driven by Moore’s law are leading to increasing process variations and additional perturbations due to temperature and voltage fluctuations which threaten the circuit functionality.  

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Notable publications

Sub-Threshold Design and Architectural Choices
C. Piguet, M. Pons, D. Séverac
ISVLSI, July 8-10, 2015, Montpellier

A 1kb single-side read 6T sub-threshold SRAM in 180 nm with 530 Hz frequency 3.1 nA total current and 2.4 nA leakage at 0.27 V
M. Pons, T.C. Le, C. Arm, D. Séverac, S. Emery, C. Piguet
S3S, October 5-8, 2015, Rohnert Park, California

A 10 kgates sub-threshold stream cipher in 180 nm with 6.1 kHz frequency 70 nA total current and 46 nA leakage at 0.33 V
M. Pons, T.C. Le, C. Arm, D. Séverac, S. Emery, C. Piguet
S3S, October 5-8, 2015, Rohnert Park, California

An Extended Shared Logarithmic Unit for Nonlinear Function Kernel Acceleration in a 65-nm CMOS Multicore Cluster
M. Gautschi, M. Schaffner, F. K. Gürkaynak, L. Benini
IEEE Journal of Solide-State Circuits, Vol. 52, No. 1, 2017


Posters from 2016

Ultra low power processing based on a sub-threshold implementation
Marc Pons, Daniel Séverac, Jean-Luc Nagel, David Ruffieux, Stéphane Emery, Philippe Rochaix

Precise and Approximate Logarithmic Number Units shared in a Multi-core Cluster
Michael Gautschi, Michael Schaffner, Frank Gurkanyak, Luca Benini

Multipliers-Driven Perturbation of Coefficients for Low-Power Operation in Reconfigurable FIR Filters
Andrea Bonetti, Adam Teman, Andreas Burg

IcySoC Ultra Low Power Design with Approximate Computing
A. Bonetti, V. Camus, J. Schlachter, C. Müller, Frank Gürkaynak, L. Benini, C. Enz, D. Ruffieux, P. Rochaix, M. Pons, A. Burg

Posters from 2015

Approximate Computing Units for an Ultra-Low Power Platform
Michael Gautschi, Antonio Pullini, Frank Gurkanyak, Luca Benini

Inexact and Approximate Circuits for Error Tolerant Applications
Jérémy Schlachter, Vincent Camus, Christian Enz

Circuits and Techniques for Dynamic Timing Monitoring in Microprocessors
Andrea Bonetti, Jeremy Constantin, Adam Teman, Andreas Burg

Sub- and near-threshold standard cell design for low-power applications
Marc Pons, Daniel Séverac, Christian Piguet, Philippe Rochaix, Thomas Lentsch

Posters from 2014

Cross-Layer Inexact Design for Low-Power Applications
Vincent Camus, Georgios Karakonstantis, Jérémy Schlachter, Andreas Burg, Christian Enz

IcySoC: Inexact Sub- and Near-Threshold Systems for Ultra-Low-Power Devices
C. Piguet, C. Enz, L. Benini, Andreas Burg, T. Lentsch, F. Gurkaynak, D. Séverac, M. Pons

Sub- and near-threshold design for nano-Watt scale integrated circuit (IC)
Marc Pons, Daniel Séverac, Christian Piguet

Ultra Low Power Processing Platform
Antonio Pullini, Frank K. Gurkaynak, Luca Benini, Adam Teman, Jeremy Constantin, Andreas Burg


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